Chiplet for Defence Application
Funds research into a shared EU chiplet library that lets defence electronics mix and match chip building blocks instead of custom ASICs.
About
This is a single-stage EDF Research Action with an indicative 2025 budget of EUR 25,000,000 for this topic, labelled as contributing to the EU's STEP objectives. Work is architecture analysis and design of a shared chiplet library and at least one defence application, rather than a finished product. Applications go through the EU Funding & Tenders Portal; country eligibility and financial checks a…
DefenseSemiconductors
Each grant below is a distinct funding opportunity with its own eligibility, scope, and deliverables.