Semiconductors grants in France

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Funds around twelve open-topic chip Innovation Action projects — pilot lines, test beds, demonstrators or market-replication pilots — anywhere across the Chips JU's technology and application roadmap.

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Funds around ten early-stage chip research projects, TRL 3-4, that develop and lab-test innovative technologies against the Chips JU's roadmap of key application areas.

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Funds one €3–4M project turning a prototype irradiation facility into a booked-beam-time service for radiation-testing Europe’s space chips.

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Funds one EU project, up to €13M, to build and qualify a radiation-hardened FPGA chip so Europe's space missions stop depending on non-EU suppliers.

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Funds one €6–7M project to industrialise an EU source of semi-insulating SiC substrates — the wafer base for the GaN chips in satellite radios.

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Pays a coordination action that connects EU and Japanese semiconductor researchers and companies to plan joint chip R&I and secure the chip supply chain.

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Funds around five chip Innovation Action projects at TRL 5-8 — pilot lines, full-scale test zones or new frameworks used in real products — anywhere on the Chips JU's 2026 roadmap.

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Funds industrial consortia that develop more sustainable, cost-effective ways to extract, process or refine raw materials used in semiconductor manufacturing.

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Pays one coordination project to map semiconductor cooperation opportunities with countries such as Japan, Korea and the United States for the Commission.

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Funds up to five projects that speed the transfer of advanced-packaging semiconductor technology from Chips JU pilot lines into industrial deployment.

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Funds two teams prototyping ultra-low-power edge AI chip designs, tested at TRL 6-7 for real-time on-device inference in battery-powered devices.

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Funds one project to design a European front-end-module chipset for 6G radio in the FR3 (7-15 GHz) frequency range.

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Funds up to four consortia building or improving open-source chip-design (EDA) tools for digital, analogue and mixed-signal design, released under an open-source licence.

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Funds consortiums including a silicon wafer manufacturer to develop cheaper, lower-energy ways to grow silicon ingots and wafers for solar cells.

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Pays one European federation of vocational-training providers up to EUR 10 million to build shared semiconductor micro-credentials and reskilling programmes.

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Funds around eight early-stage chip research projects, TRL 3-4, that develop and lab-test innovative technologies against the Chips JU's 2026 roadmap.

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Funds up to two teams building a high-performance RISC-V automotive hardware platform — processors, AI accelerators and the software tool-chain — for autonomous driving.

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Pays up to two academic consortia between EUR 1 million and EUR 10 million each to build semiconductor 'Hubs of Excellence' offering industry-aligned degree programmes.

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Pays one consortium up to EUR 15 million to run a Europe-wide chip-design skills programme, funding at least 1,000 student tape-outs over four years.

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Funds one accelerator to bring strained silicon-on-insulator substrates to industrial-scale wafer production for 7nm FD-SOI chip manufacturing.

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Pays one European consortium EUR 1 million to map semiconductor regional clusters, share best practice on permitting and infrastructure, and build an online platform connecting them.

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Funds one coordination project up to EUR 1 million to build a support network and information hub for Europe's fabless semiconductor start-ups and SMEs.

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Pays for the secretariat that runs Europe's semiconductor industry alliance, coordinating roadmaps, working groups and an annual assembly.

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Funds EU development of the next generation of infrared-detector readout chips so Europe isn't dependent on non-EU sensor supply chains.